The present invention relates to a semiconductor memory and a method for fabricating the same, and more particularly, it relates to a memory cell structure of a semiconductor memory using a high-xcexa film or a ferroelectric film.
Recently, for multimedia equipment required to have a large memory capacity and a high data transfer rate, embedded-DRAM processes for combining DRAMs with a high performance logic circuit has been practically employed.
In conventional DRAM process, however, since it is necessary to perform high temperature annealing for forming a capacitor insulating film of a capacitor working as a memory capacitor, the impurity concentration profile of impurity diffusion layers of a transistor included in a high performance logic circuit can be disadvantageously degraded through this high temperature annealing. Also, in process for merely a memory such as a DRAM or a FeRAM, high temperature annealing is preferably avoided for reducing the size of a memory cell transistor.
Therefore, it is indispensable to develop a MIM (Metal-Insulator-Metal) capacitor using, as a capacitor insulating film of a memory capacitor, a high-xcexa film that can be formed at a low temperature and can provide a fine memory cell. An example of the high-xcexa film is a dielectric film having a perovskite structure such as a BST ((BaSr)TiO3) film. On the other hand, as a material for a metal electrode of the MIM capacitor, Pt with high oxidation resistance is generally regarded as a promising material. Also, dielectric films with the perovskite structure, such as a SBT (SrBi2Ta2O9) film and a BTO (Bi4Ti3O12) film, are well known as ferroelectric films.
The conventional MIM capacitor serving as a memory capacitor has, however, the following problems:
When a contact hole is formed to reach a Pt electrode (upper electrode) provided on a capacitor insulating high-xcexa film film, a reducing atmosphere and the like employed in forming a contact plug may harmfully affect the characteristic of the capacitor. In general, most of dielectric films are oxides, and hence, oxygen included in such a dielectric film may be lost due to the reducing atmosphere. In particular, when the capacitor insulating film is a high-xcexa film or a ferroelectric film, there is high possibility of the oxygen loss. Particularly in a dielectric film with the perovskite structure, the characteristic can be largely degraded due to the oxygen loss.
Furthermore, in fabrication of devices such as a DRAM that conventionally do not use a Pt electrode, it is difficult to use the existing facilities for, for example, forming a contact reaching a Pt electrode that is newly used, and hence, such a procedure need to be performed by using dedicated facilities. This is for the following reason: For example, in forming a contact hole connected to a Pt electrode through an interlayer insulating film, Pt is sputtered when the Pt electrode is exposed, and hence, Pt is adhered onto the walls and members within a chamber. If this chamber is used for another process without any treatment, the Pt enters an active region or the like of a transistor, which can harmfully affect the operation of the transistor.
An object of the invention is providing a semiconductor memory including a MIM capacitor with a good characteristic and a method for fabricating the same by forming an interconnect layer connected not directly but indirectly to an upper electrode made from Pt or the like formed on a capacitor insulating film.
Another object of the invention is providing a semiconductor memory and a method for fabricating the same in which the fabrication cost can be lowered because no dedicated facilities are necessary.
The semiconductor memory of this invention includes a memory capacitor that is formed on an insulating layer over a semiconductor substrate and includes a lower electrode, an upper electrode and a capacitor insulating film disposed between the lower electrode and the upper electrode; a capacitor insulating film extension and an upper electrode extension extending respectively from the capacitor insulating film and the upper electrode of the memory capacitor; a dummy conducting member including a portion below the upper electrode extension and the capacitor insulating film extension; a conducting member in contact with side faces of the upper electrode extension and the capacitor insulating film extension and connected to the dummy conducting member; and an upper interconnect electrically connected to the dummy conducting member.
Thus, there is no need to directly connect the upper interconnect to the upper electrode. Therefore, even when the upper electrode is made from Pt or the like, characteristic degradation derived from exposure of the capacitor insulating film to a reducing atmosphere can be prevented.
When the conducting member covers entire peripheral side faces of the upper electrode extension and the capacitor insulating film extension, more definite electrical connection can be obtained.
The capacitor insulating film may be a high-xcexa film or a ferroelectric film.
When the semiconductor memory further includes a bit line formed below the memory capacitor with the insulating layer sandwiched therebetween; a local interconnect formed by using the same conductor film as that used for forming the bit line; and a conducting plug for connecting the dummy lower electrode and the local interconnect to each other through the insulating layer, a structure suitable to a memory of a capacitor over bit-line can be obtained by utilizing the conductor film used for forming the bit line.
The semiconductor memory can further include an isolation insulating film provided on the semiconductor substrate below the insulating layer; a memory cell transistor that is provided on the semiconductor substrate in a region surrounded with the isolation insulating film and includes a gate electrode and impurity diffusion layers formed in the semiconductor substrate on both sides of the gate electrode; a local interconnect provided on the isolation insulating film and formed by using the same conductor film as that used for forming the gate electrode; and a conducting plug connected to the local interconnect through the interlayer insulating film. Thus, a structure applicable to a memory of both a capacitor over bit-line and a capacitor under bit-line can be obtained by utilizing the conductor film (such as a polysilicon film) used for forming the gate electrode.
The semiconductor memory can further include a memory cell transistor that is provided on the semiconductor substrate and includes a gate electrode and impurity diffusion layers formed in the semiconductor substrate on both sides of the gate electrode; a local interconnect made from another impurity diffusion layer spaced from the impurity diffusion layers in the semiconductor substrate; and a conducting plug connected to the local interconnect through the insulating layer. Thus, a structure applicable to a memory of both a capacitor over bit-line and a capacitor under bit-line be obtained by utilizing the process for forming the source and drain regions.
When the dummy conducting member is provided in a region surrounded, on a side face thereof, with at least the insulating layer and the conducting member is in contact with the upper electrode extension and the dummy conducting member, the upper electrode extension and the upper interconnect can be electrically connected to each other without providing the dummy lower electrode. Therefore, the area of the semiconductor memory can be reduced.
In the semiconductor memory, the dummy conducting member can be a local interconnect, and the upper interconnect can be in contact with the local interconnect.
In the semiconductor memory, the dummy conducting member can be a dummy plug, and the conducting member can be in contact with at least a part of a top face of the dummy plug.
In the semiconductor memory, the conducting member can be a conducting sidewall that is provided over side faces of the upper electrode extension and the capacitor insulating film extension and is in contact with at least a part of a top face of the dummy conducting member.
When the lower electrode, the capacitor insulating film and the upper electrode of the memory capacitor are in the shape of a cylinder, memory cells can be arranged at comparatively high density in the semiconductor memory.
The method of this invention for fabricating a semiconductor memory containing a memory capacitor including a lower electrode, an upper electrode and a capacitor insulating film disposed between the lower electrode and the upper electrode; a dummy conducting member electrically connected to the upper electrode; and an upper interconnect electrically connected to the dummy conducting member, includes the steps of (a) forming the lower electrode by forming a first conductor film over an insulating layer on a semiconductor substrate and patterning the first conductor film; (b) forming a dielectric film covering the lower electrode; (c) forming a second conductor film covering the dielectric film; (d) forming, on the second conductor film, an etching mask covering a part of the lower electrode; (e) patterning the second conductor film and the dielectric film, whereby forming the capacitor insulating film and a capacitor insulating film extension from the dielectric film and the upper electrode and an upper electrode extension from the second conductor film; and (f) depositing a third conductor film on the substrate after the step (e) and patterning the third conductor film, whereby forming a conducting member in contact with side faces of the upper electrode extension and the capacitor insulating film extension and electrically connected to the dummy conducting member.
In this method, the upper electrode and the dummy conducting member are electrically connected to each other through the conducting member in the step (f). Therefore, there is no need to form a contact above the upper electrode, and hence, the characteristic degradation of the capacitor insulating film can be prevented. Also, the number of photolithography procedures and the like is not increased between the steps (a) and (f) as compared with that in conventional technique.
In the method for fabricating a semiconductor memory, the lower electrode and a dummy film spaced away from the lower electrode can be formed by patterning the first conductor film in the step (a), a dummy lower electrode can be formed as at least a part of the dummy conducting member by patterning the dummy film in any step between the step (b) and the step (e), and the conducting member formed in the step (f) can be in contact with side faces of the upper electrode extension, the capacitor insulating film extension and the dummy lower electrode and covers at least a part of a portion above the upper electrode extension. Thus, the upper electrode and the upper interconnect can be electrically connected to each other through the conducting member and the dummy lower electrode.
The method for fabricating a semiconductor memory may further include, before the step (a), a step of forming at least a part of the dummy conducting member in a region surrounded, on a side face thereof, with the insulating layer, and the conducting member formed in the step (f) can be in contact with at least a part of a top face of the dummy conducting member. Thus, the upper electrode and the upper interconnect can be electrically connected to each other through the conducting member and the dummy conducting member.
In the method for fabricating a semiconductor memory, the conducting member formed in the step (f) can be a conductor film that is in contact with the side faces of the upper electrode extension and the capacitor insulating film extension and covers at least a part of a portion above the upper electrode extension.
In the method for fabricating a semiconductor memory, the conducting member formed in the step (f) can be a conducting sidewall in contact with the side faces of the upper electrode extension and the capacitor insulating film extension.
In the method for fabricating a semiconductor memory, the dielectric film may be a high-xcexa film or a ferroelectric film.